Passive component integration in LTCC

The capability to bury passive components is a significant advantage of the Low Temperature Co-fired Ceramic (LTCC) technology. High density, high speed, and multi-junctional circuits can be realized using the LTCC technology. The integration of capacitive components into the ceramic substrate also reduces the parasitic effect when the decoupling capacitors are in the close vicinity of the semiconductor chips. Currently the parallel pate capacitors can be conveniently fabricated into the ceramic substrate using a layer of LTCC as dielectric. However, the capacitance density is limited by the relative low dielectric constant (k) of the LTCC and the layer thickness of the LTCC tape. Higher capacitance density can be achieved by screen-printing high k dielectric paste. The interaction of high k dielectric and LTCC has always been a concern. The infiltration of the low k LTCC into the high k capacitor structure reduces the dielectric constant of the capacitor. The interaction between LTCC and high k capacitor dielectric leads to distortion of the LTCC structure. In addition, electrode conductors for the parallel plate capacitor can have an adverse effect on the properties of the capacitor. A high k dielectric paste was tested for A6 LTCC using silver metallization. The parallel plate capacitor structures buried in the LTCC test parts were built. It was found that the capacitance density of 17.5 pF/mm(2) can be achieved and the capacitor has a better than X7P temperature characteristics.