A Flexible Precision Multi-Format In-Memory Vector Matrix Multiplication Engine in 65 nm CMOS With RF Machine Learning Support

被引：1

作者：

Mukherjee, Mandovi ^{[1
]}

Long, Yun ^{[1
]}

Woo, Jongseok ^{[1
]}

Kim, Daehyun ^{[1
]}

Rahman, Nael Mizanur ^{[1
]}

Dash, Saurabh ^{[1
]}

Mukhopadhyay, Saibal ^{[1
]}

机构：

[1] Georgia Inst Technol, Sch Elect & Comp Engn, Atlanta, GA 30332 USA

来源：

IEEE SOLID-STATE CIRCUITS LETTERS | 2020年 / 3卷 / 03期

基金：

美国国家科学基金会;

关键词：

Accelerators; processing-in-memory (PIM); radio-frequency (RF) machine learning (ML); vector matrix multiplication (VMM);

D O I：

10.1109/LSSC.2020.3023703

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

An all-digital flexible precision in-memory accelerator for vector matrix multiplication (VMM) is demonstrated in 65 nm CMOS. The design supports flexible precision, floating point, and complex numbers enabling in-memory radio-frequency machine learning and signal processing computation. The measured compute efficiency normalized to memory size is 34 GOPS/W/KB.

引用

页码：450 / 453

页数：4