Reconfigurable Hardware Objects for Image Processing on FPGAs

被引：0
|
作者：
Kloub, Jan [1 ]
Honzik, Petr [1 ]
Danek, Martin [1 ]
机构：
[1] Inst Informat Theory & Automat ASCR, Vodarenskou Vezi 4, Prague 18208 8, Czech Republic
来源：
PROCEEDINGS OF THE 13TH IEEE SYMPOSIUM ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS AND SYSTEMS | 2010年
关键词：
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
Embedded systems are getting more complex; that is why the high level of abstraction is required during the development process. High abstraction methods simplify implementation of complex computation systems and shorten the time to market. This paper presents an implementation of a graphic computing element (GCE) which can be used as a runtime parametrized building block in image processing applications in FPGAs. In terms of the object oriented model GCE encapsulates its internal data representation and rules for their manipulation. Several basic image processing operations have been implemented (Sobel edge detection, Gauss, mean, etc. filtering). These operations are called as GCE methods. Because of high spatial dependency of image data in image processing, an efficient image data reuse method has been implemented.
引用
收藏
页码：121 / 122
页数：2
相关论文
共 50 条
  • [1] Image processing using reconfigurable FPGAs
    Ferguson, L
    HIGH-SPEED COMPUTING, DIGITAL SIGNAL PROCESSING, AND FILTERING USING RECONFIGURABLE LOGIC, 1996, 2914 : 110 - 121
  • [2] Reconfigurable FPGAS for real time image processing in space
    Dawood, AS
    Visser, SJ
    Williams, JA
    DSP 2002: 14TH INTERNATIONAL CONFERENCE ON DIGITAL SIGNAL PROCESSING PROCEEDINGS, VOLS 1 AND 2, 2002, : 845 - 848
  • [3] Compiling image processing applications to reconfigurable hardware
    Rinker, R
    Hammes, J
    Najjar, WA
    Böhm, W
    Draper, B
    IEEE INTERNATIONAL CONFERENCE ON APPLICATION-SPECIFIC SYSTEMS, ARCHITECTURES, AND PROCESSORS, PROCEEDINGS, 2000, : 56 - 65
  • [4] Reconfigurable hardware for real time image processing
    Kessal, L
    Demigny, D
    Boudouani, N
    Bourguiba, R
    2000 INTERNATIONAL CONFERENCE ON IMAGE PROCESSING, VOL III, PROCEEDINGS, 2000, : 110 - 113
  • [5] Real time image processing with reconfigurable hardware
    Vega-Rodríguez, MA
    Sánchez-Pérez, JM
    Gómez-Pulido, JA
    ICECS 2001: 8TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS I-III, CONFERENCE PROCEEDINGS, 2001, : 213 - 216
  • [6] Implementation of Medical Image Processing Algorithm on Reconfigurable Hardware
    Chiuchisan, Iuliana
    2013 E-HEALTH AND BIOENGINEERING CONFERENCE (EHB), 2013,
  • [7] FPGAs as reconfigurable processing elements
    Bouldin, DW
    IEEE CIRCUITS AND DEVICES MAGAZINE, 1996, 12 (02): : 8 - 10
  • [8] Accelerating matrix product on reconfigurable hardware for image processing applications
    Bensaali, F
    Amira, A
    Bouridane, A
    IEE PROCEEDINGS-CIRCUITS DEVICES AND SYSTEMS, 2005, 152 (03): : 236 - 246
  • [9] Hardware and Software Performance of Image Processing Applications on Reconfigurable Systems
    Mishra, Ashish
    Agarwal, Mohit
    Raju, Kota Solomon
    2015 ANNUAL IEEE INDIA CONFERENCE (INDICON), 2015,
  • [10] Runtime assignment of reconfigurable hardware components for image processing pipelines
    Quinn, H
    King, LAS
    Leeser, M
    Meleis, W
    FCCM 2003: 11TH ANNUAL IEEE SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES, PROCEEDINGS, 2003, : 173 - 182
12345