First results of the front-end ASIC for the strip detector of the PANDA MVD

被引：1

作者：

Quagli, T. ^{[1
]}

Brinkmann, K. -T. ^{[1
]}

Calvo, D. ^{[3
]}

Di Pietro, V. ^{[1
]}

Lai, A. ^{[2
]}

Riccardi, A. ^{[1
]}

Ritman, J. ^{[2
]}

Rivetti, A. ^{[3
]}

Rolo, M. D. ^{[3
]}

Stockmanns, T. ^{[2
]}

Wheadon, R. ^{[3
]}

Zambanini, A. ^{[2
]}

机构：

[1] Justus Liebig Univ Giessen, Phys Inst 2, Heinrich Buff Ring 16, D-35392 Giessen, Germany

[2] Forschungszentrum Julich, Wilhelm Johnen Str, D-52425 Julich, Germany

[3] INFN, Sez Torino, Via Pietro Giuria 1, I-10125 Turin, Italy

来源：

JOURNAL OF INSTRUMENTATION | 2017年 / 12卷

关键词：

Data acquisition circuits; Front-end electronics for detector readout; Si microstrip and pad detectors;

D O I：

10.1088/1748-0221/12/03/C03063

中图分类号：

TH7 [仪器、仪表];

学科分类号：

0804 ; 080401 ; 081102 ;

摘要：

PANDA is a key experiment of the future FAIR facility and the Micro Vertex Detector (MVD) is the innermost part of its tracking system. PASTA (PAnda STrip ASIC) is the readout chip for the strip part of the MVD. The chip is designed to provide high resolution timestamp and charge information with the Time over Threshold (ToT) technique. Its architecture is based on Time to Digital Converters with analog interpolators, with a time bin width of 50 ps. The chip implements Single Event Upset (SEU) protection techniques for its digital parts. A first full-size prototype with 64 channels was produced in a commercial 110 nm CMOS technology and the first characterizations of the prototype were performed.

引用

页数：9

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