Mixed compact and behavior modeling using AHDL Verilog-A

被引：0
|
作者：
Wu, HC [1 ]
Mijalkovic, S [1 ]
Macías, JG [1 ]
Burghartz, J [1 ]
机构：
[1] Delft Univ Technol, Lab Elect Components Technol & Mat, NL-2628 CD Delft, Netherlands
来源：
BMAS 2003: PROCEEDINGS OF THE 2003 IEEE INTERNATIONAL WORKSHOP ON BEHAVIORAL MODELING AND SIMULATION | 2003年
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D O I：
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中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
The way from the compact model development to implementation into a commercial circuit simulator is often time consuming. Moreover, it is not always straightforward how to implement behavior models in SPICE-like simulators. In this paper, a capability of the analog hardware description language (AHDL) Verilog-A to handle state-of-the-art compact bipolar transistor modeling mixed with behavioral substrate coupling modeling has been demonstrated.
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页码：139 / 143
页数：5
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