Chaotic Spread Spectrum Modulation - A Hardware Implementation Approach

被引：0
|
作者：
Kashyap, Katyayani [1 ]
Sarma, Manash Pratim [1 ]
Sarma, Kandarpa Kumar [2 ]
机构：
[1] Gauhati Univ, Dept Elect & Commun Engn, Gauhati 781014, Assam, India
[2] Gauhati Univ, Dept Elect & Commun Technol, Gauhati 781014, Assam, India
来源：
2014 INTERNATIONAL CONFERENCE ON ADVANCES IN ELECTRONICS, COMPUTERS AND COMMUNICATIONS (ICAECC) | 2014年
关键词：
Logistic map code; DS SS; Gold code; Verilog-HDL;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
Spread spectrum modulation nds important place in wireless communication primarily due to its application in Code Division Multiple Access (CDMA) and so on. One of the critical issue in such modulation is the generation of spreading sequence. This paper presents a hardware approach for design of chaotic spreading sequence for application in a Direct Sequence Spread Spectrum (DS SS) system for a faded wireless channel. Enhancing the security of data transmission is a prime issue which can better be addressed with a chaotic sequence. Generation and application of chaotic sequence is done and a comparison with Gold sequence is presented which clearly indicates achieving better performance with simplicity of design. The primary blocks of the system are implemented using Verilog and the performances noted.
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页数：6
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