Lateral Variation-Doped Insulated Gate Bipolar Transistor for Low On-State Voltage With Low Loss

被引:5
|
作者
Vaidya, Mahesh [1 ]
Naugarhiya, Alok [1 ]
Verma, Shrish [1 ]
Mishra, Guru Prasad [1 ]
机构
[1] Natl Inst Technol Raipur, Dept Elect & Commun Engn, Raipur 492010, Madhya Pradesh, India
关键词
IGBT; Darlington pair; E-off; Von; TRENCH; IGBT; SIMULATION;
D O I
10.1109/LED.2020.2986941
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this letter, a new structure of Insulated Gate Bipolar Transistor (IGBT) with lateral variation doping concept in epitaxial region is presented. In the drift region, the lateral variation doping profile acts as a parasitic wide base pnp transistor over pn superjunction (SJ). This parasitic pnp transistor forms Darlington pair with IGBT's internal pnp transistor. The parasitic Darlington pair increases the output current gain and reduces the On-state voltage drop (V-on). Apart from this, p(-)-col in the collector layer provides increment in recombination rate of minority charges. An increase in the recombination rate reduces the minority carrier life-time, which further reduces the turn-off and delay time. Improvement in the turn-off time leads to optimize the trade-off between turn-off energy loss (E-off) and V-on, as compared to the conventional structure.
引用
下载
收藏
页码:888 / 891
页数:4
相关论文
共 50 条
  • [1] A low-loss variable-doped trench-insulated gate bipolar transistor with reduced on-state voltage
    Vaidya, Mahesh
    Naugarhiya, Alok
    Verma, Shrish
    Prasad Mishra, Guru
    SEMICONDUCTOR SCIENCE AND TECHNOLOGY, 2021, 36 (07)
  • [2] A Novel Double-Gate Trench Insulated Gate Bipolar Transistor with Ultra-low On-state Voltage
    Hsu, Wesley Chih-Wei
    Udrea, Florin
    Chen, Ho-Tai
    Lin, Wei-Chieh
    2009 21ST INTERNATIONAL SYMPOSIUM ON POWER SEMICONDUCTOR DEVICES & ICS, 2009, : 291 - +
  • [3] Low on-state voltage and saturation current Trench Insulated Gate Bipolar Transistor with integrated Zener diode
    Li, Ping
    Cheng, Junji
    Chen, Xingbi
    ELECTRONICS LETTERS, 2017, 53 (24) : 1608 - 1610
  • [4] A New Low Turn-Off Loss SOI Lateral Insulated Gate Bipolar Transistor With Buried Variation of Lateral Doping Layer
    Tian, Tao
    Zhang, Sheng-Li
    Guo, Yu-Feng
    Zhang, Jun
    Pan, David Z.
    Yang, Ke-Meng
    IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY, 2019, 7 (01) : 62 - 69
  • [5] Collector Engineered Bidirectional Insulated Gate Bipolar Transistor With Low Loss
    Vaidya, Mahesh
    Naugarhiya, Alok
    Verma, Shrish
    Mishra, Guru Prasad
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2022, 69 (03) : 1604 - 1607
  • [6] An on-state analytical model for the trench insulated gate bipolar transistor (TIGBT)
    Udrea, F
    Amaratunga, GAJ
    SOLID-STATE ELECTRONICS, 1997, 41 (08) : 1111 - 1118
  • [7] 4 kV insulated gate controlled thyristor with low on-state voltage drop
    Sakano, J
    Kobayashi, H
    Nagasu, M
    Mori, M
    ISPSD '96 - 8TH INTERNATIONAL SYMPOSIUM ON POWER SEMICONDUCTOR DEVICES AND ICS, PROCEEDINGS, 1996, : 253 - 256
  • [8] Low Loss Gate Engineered Superjunction Insulated Gate Bipolar Transistor for High Speed Application
    Behera, Shriharsh Prasad
    Vaidya, Mahesh
    Naugarhiva, Alok
    PROCEEDINGS OF THE 37TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, VLSID 2024 AND 23RD INTERNATIONAL CONFERENCE ON EMBEDDED SYSTEMS, ES 2024, 2024, : 1 - 5
  • [9] Low Loss Insulated Gate Bipolar Transistor With Electron Injection (EI-IGBT)
    Chen, Wanjun
    Tao, Hong
    Lou, Lunfei
    Liu, Chao
    Cheng, Wu
    Tang, Xuefeng
    Liu, Hongquan
    Zhou, Qi
    Deng, Xiaochuan
    Li, Zhaoji
    Zhang, Bo
    IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY, 2017, 5 (04): : 275 - 282
  • [10] Low Turn-Off Loss Lateral Insulated Gate Bipolar Transistor With Double Deep P-Regions
    Dai, Kaiwei
    Wei, Jie
    Zhou, Quan
    Yang, Kemeng
    Lu, Jinlong
    Liu, Xindi
    Li, Zhaoji
    Zhang, Bo
    Luo, Xiaorong
    IEEE Transactions on Electron Devices, 2024, 71 (12) : 8037 - 8040