共 6 条
- [2] Formal verification techniques based on Boolean satisfiability problem [J]. JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY, 2005, 20 (01): : 38 - 47
- [3] Formal Verification Techniques Based on Boolean Satisfiability Problem [J]. Journal of Computer Science and Technology, 2005, 20 : 38 - 47
- [4] Formal verification of superscalar microprocessors with multicycle functional units, exceptions, and branch prediction [J]. 37TH DESIGN AUTOMATION CONFERENCE, PROCEEDINGS 2000, 2000, : 112 - 117
- [5] Efficient translation of boolean formulas to CNF in formal verification of microprocessors [J]. ASP-DAC 2004: PROCEEDINGS OF THE ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE, 2004, : 310 - 315
- [6] Formal Verification of Modular Multipliers using Symbolic Computer Algebra and Boolean Satisfiability [J]. PROCEEDINGS OF THE 59TH ACM/IEEE DESIGN AUTOMATION CONFERENCE, DAC 2022, 2022, : 1183 - 1188