Built-in Self-Test of Vector Matrix Multipliers on a Reconfigurable Device

被引：0

作者：

Natarajan, Aishwarya ^{[1
]}

Hasler, Jennifer ^{[1
]}

机构：

[1] Georgia Inst Technol, Atlanta, GA 30332 USA

来源：

2020 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) | 2020年

关键词：

VMM; MITE; Floating gates; weights; injection; POWER;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

An analog Vector Matrix Multiplier (VMM) along with its interface through Multi-Input Translinear Elements (MITE) is compiled on a reconfigurable Field Programmable Analog Array (FPAA) on a 350nm process. The paper focuses on the tuning algorithm to set the weights on the VMM as well as to produce levels of voltage near the power supply rails, V-dd, to the source-driven VMMs, by application of a wide range of input levels. The constraints during the design and implementation process, accounting for the mismatch in devices, are discussed. A significant reduction in the variation in the levels of the desired voltage has been demonstrated in the paper.

引用

页数：5

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