Compensator design and stability assessment for fast voltage loops of power factor correction rectifiers

This paper introduces a new method for stability analysis and design of fast voltage-loop compensators in rectifiers with power factor correction (PFC). The method has few constraints and can be used with various implementations of the fast voltage loop. It is based on utilization of circle criterion, which unifies frequency domain and nonlinear system analysis. A step-by-step procedure of stability assessment and compensator design is described and demonstrated on two-controller implementations. In the first system, the voltage-loop dynamic response of an experimental 200-W digitally-controlled boost-based PFC is improved with a self-tuning comb filter. In the second implementation, it is shown how the circle criterion can be used to design a fast voltage loop for controllers with regulation band, i.e., "dead-zone," element for ripple elimination.