Dynamic clock scaling for energy-aware embedded systems

This paper presents a method for power management of energy-aware embedded systems. The method is suitable for systems on a chip or microcontrollers where a processor runs in parallel with embedded peripherals. Since the approach is based on clock rate control, it is very easy to implement. While the assumption is that the CPU has an active and a power-saving mode, we introduce a fine-grain energy model which accords well with individually controlled peripherals. The method allows calculating an optimal clock frequency for each task. Also, we discuss the case when the clock scaling must be consistent with constant-clock peripherals such as timers. Under this hardware model we outlined possibilities to scale the CPU clock rate keeping the constant-clock peripherals operational.