FPGA implementation of a statically reconfigurable Java']Java environment for embedded systems

被引:0
|
作者
Nino, Shinsuke [1 ]
Mori, Takayuki [1 ]
Ko, YoungHun [1 ]
Shibata, Yuichiro [1 ]
Oguri, Kiyoshi [1 ]
机构
[1] Nagasaki Univ, Dept Comp & Informat Sci, Nagasaki 8548521, Japan
关键词
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
A demand for low power and high performance Java environments is now growing in the embedded systems field. One approach is dedicated Java processors which directly execute Java bytecode. We have proposed a novel reconfigurable Java environment which consists of a general purpose core processor with configurable bytecode processing units, a bytecode compiler, and a software Java Virtual Machine (JVM). This paper discusses design of a memory system for the reconfigurable Java architecture focusing on a hardware custom stack. Empirical evaluation using prototype systems reveals that adding a 2-word hardware stack shows the best results, achieving the performance enhancement of up to 15.9% compared to software execution.
引用
收藏
页码:317 / 320
页数:4
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