An Efficient Encoder Architecture Design for Cognitive Radio Networks

被引：1

作者：

Kumari, D. Abitha ^{[1
]}

Sutha, J. ^{[2
]}

机构：

[1] Sethu Inst Technol, Fac Comp Sci & Engn, Virudunagar, Tamil Nadu, India

[2] AAA Coll Engn & Technol, Fac Comp Sci & Engn, Sivakasi, Tamil Nadu, India

来源：

WIRELESS PERSONAL COMMUNICATIONS | 2018年 / 103卷 / 04期

关键词：

CR network; Interference; Low power; Performance; Architecture; INTERFERENCE CANCELLATION;

D O I：

10.1007/s11277-018-6001-1

中图分类号：

TN [电子技术、通信技术];

学科分类号：

0809 ;

摘要：

Interference formation between received symbols in Cognitive Radio (CR) network system is the main problem which reduces the performance of the CR networks. In this paper, efficient encoder architecture for interference suppression is designed for low power applications in CR networks. The proposed architecture is imposed into various spartan processors to analyze the power consumption and current consumption. The proposed system architecture is analyzed in terms of power and current consumptions using Xilinx Project Navigator.

引用

页码：3181 / 3188

页数：8

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