A Compact Spice Model with Verilog-A for Phase Change Memory

被引:16
|
作者
Cai Dao-Lin [1 ]
Song Zhi-Tang [1 ]
Li Xi [1 ]
Chen Hou-Peng [1 ]
Chen Xiao-Gang [1 ]
机构
[1] Chinese Acad Sci, Lab Nanotechnol, State Key Lab Funct Mat Informat, Shanghai Inst Microsyst & Informat Technol, Shanghai 200050, Peoples R China
关键词
PCRAM;
D O I
10.1088/0256-307X/28/1/018501
中图分类号
O4 [物理学];
学科分类号
0702 ;
摘要
A compact spice model of the phase change memory with the crystalline fraction as the switching by Verilog-A language is proposed and demonstrated. The model can simulate not only the resistance change by the different electrical pulse, but also the temperature profile and crystalline fraction during programming operation. The simulated resistance as a function of the amplitude of programming voltage pulses is in good agreement with the experimental data.
引用
收藏
页数:3
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