New smart readout technique performing edge detection designed to control vision sensors dataflow

In this paper, a new readout strategy for CMOS image sensors is presented. It aims to overcome the excessive output dataflow bottleneck; this challenge is becoming more and more crucial along with the technology miniaturization. This strategy is based on the spatial redundancies suppression. It leads the sensor to perform edge detection and eventually provide binary image. One of the main advantages of this readout technique compared to other techniques, existing in the literature, is that it does not affect the in-pixel circuitry. This means that all the analogue processing circuitry is implemented outside the pixel, which keeps the pixel area and Fill Factor unchanged. The main analogue block used in this technique is an event detector developed and designed in the CMOS 0.35 mu m technology from Austria Micro Systems. The simulation results of this block as well as the simulation results of a test bench composed of several pixels and column amplifiers using this readout mode show the capability of this readout mode to reduce dataflow by controlling the ADCs. We must mention that this readout strategy is applicable on sensors that use a linear operating pixel element as well as for those based on logarithmic operating pixels. This readout technique is emulated by a MATLAB model which gives an idea about the expected functionalities and dataflow reduction rates (DRR). Emulation results are shown lately by giving the pre and post processed images as well as the DRR. This last cited does not have a fix value since it depends on the spatial frequency of the filmed scenes and the chosen threshold value.