Application of Deep Compression Technique in Spiking Neural Network Chip

被引：10

作者：

Liu, Yanchen ^{[1
]}

Qian, Kun ^{[1
]}

Hu, Shaogang ^{[1
]}

An, Kun ^{[2
]}

Xu, Sheng ^{[3
]}

Zhan, Xitong ^{[1
]}

Wang, J. J. ^{[1
]}

Guo, Rui ^{[1
]}

Wu, Yuancong ^{[1
]}

Chen, Tu-Pei ^{[4
]}

Yu, Qi ^{[5
]}

Liu, Yang ^{[5
]}

机构：

[1] Univ Elect Sci & Technol China, Chengdu 610054, Peoples R China

[2] Omnivis Thchnol Inc, Shanghai 201210, Peoples R China

[3] Cambricon Informat Technol Co, Shanghai, Peoples R China

[4] Nanyang Technol Univ, Sch Elect & Elect Engn, Singapore 639798, Singapore

[5] Univ Elect Sci & Technol China, State Key Lab Elect Thin Films & Intergrated, Chengdu 610054, Peoples R China

来源：

IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS | 2020年 / 14卷 / 02期

基金：

中国国家自然科学基金;

关键词：

Deep compression; network-on-chip; neuron; spiking neural network; synapse; ON-CHIP; DESIGN; SYSTEM;

D O I：

10.1109/TBCAS.2019.2952714

中图分类号：

R318 [生物医学工程];

学科分类号：

0831 ;

摘要：

In this paper, a reconfigurable and scalable spiking neural network processor, containing 192 neurons and 6144 synapses, is developed. By using deep compression technique in spiking neural network chip, the amount of physical synapses can be reduced to 1/16 of that needed in the original network, while the accuracy is maintained. This compression technique can greatly reduce the number of SRAMs inside the chip as well as the power consumption of the chip. This design achieves throughput per unit area of 1.1 GSOP/(s. mm(2)) at 1.2 V, and energy consumed per SOP of 35 pJ. A 2-layer fully-connected spiking neural network is mapped to the chip, and thus the chip is able to realize handwritten digit recognition on MNIST with an accuracy of 91.2%.

引用

页码：274 / 282

页数：9

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