Exploit parallelism in intersecting compressed bit vectors for inverted file organization

The inverted file organization has been applied to information retrieval and secondary-key access. rn this organization, inverted lists are used to locate data record which contain corresponding attribute values. With the use of compression, retrieval time and storage requirement for inverted lists can be reduced However, this increases the CPU load. Moreover: the query processing cost on large database is dominated by the intersection of inverted lists. This paper exploits the parallelism for intersecting compressed inverted lists, and proposes a parallel architecture to expand the compressed inverted lists, intersect the inverted lists in parallel, and pipeline the expansion and intersection operations in two stages. This parallel architecture can be accomplished by the current VLSI technology to release CPU load. This architecture can be applied to generate multiple-attribute lexicon for interpreting hand-written addresses. The simulation result of the parallel architecture shows that the speed of intersecting compressed inverted lists can be at least 160 times faster than that by the traditional implementation.