Vector Bank Based Multimedia Codec System-on-a-Chip (SoC) Design

被引:1
|
作者
Chen, Ruei-Xi [1 ]
Zhao, Wei [2 ]
Fan, Jeffrey [2 ]
Davari, Asad [3 ]
机构
[1] St Johns Univ, Comp Sci & Informat Engn, Taipei, Taiwan
[2] Florida Int Univ, Elect Comp Engn, Miami, FL USA
[3] West Virginia Univ, Inst Technol, Elect & Comp Engn, Montgomery, WV USA
关键词
H.264; Edge Detection; Motion Estimation;
D O I
10.1109/I-SPAN.2009.74
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
In this paper, we present a design architecture of implementing a "Vector Bank" into video encoder system, namely, an H.264 encoder, in order to detect and analyze the moving objects within the speciBc area. Also, we believe that the transmitting bandwidth could be saved with the implementation of Vector Bank design. Motion Estimation is a common technology for today's video codec. By abstracting the vector data from the Motion Estimation block using the motion detection method and with the application of Laplacian of Gaussian operator, we could obtain the object motion data generated by up to 16 reference frames. Thus, it could save the bandwidth, processing load, and memory resources dramatically.
引用
收藏
页码:515 / +
页数:3
相关论文
共 50 条
  • [1] Short courses in System-on-a-Chip (SoC) design
    Kourtev, IS
    Hoare, RR
    Levitan, SP
    Cain, T
    Childers, BR
    Chiarulli, DM
    Landis, D
    [J]. 2003 IEEE INTERNATIONAL CONFERENCE ON MICROELECTRONIC SYSTEMS EDUCATION, PROCEEDINGS, 2003, : 126 - 127
  • [2] Multidisciplinary collaborative design course for system-on-a-chip (SOC)
    Ewing, RL
    Lamont, GB
    Abdel-Aty-Zohdy, HS
    [J]. MICROELECTRONICS EDUCATION, 2000, : 257 - 260
  • [3] System-on-a-Chip (SoC) model of a micropump
    Hodge-Miller, AM
    Newcomb, RW
    [J]. 2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS, 2005, : 2787 - 2790
  • [4] Special issue on System-on-a-Chip (SOC) - Preface
    Nakamura, T
    [J]. FUJITSU SCIENTIFIC & TECHNICAL JOURNAL, 2000, 36 (01): : 1 - 2
  • [5] A VLSI system-on-a-chip (SoC) for digital communications
    Srinivas, V. Chandrasekhara
    Bhowmick, S. K.
    Krishna, S. Gopi
    Saharia, Pranab
    [J]. 2006 IFIP INTERNATIONAL CONFERENCE ON WIRELESS AND OPTICAL COMMUNICATIONS NETWORKS, 2006, : 148 - +
  • [6] System-on-a-chip (SoC)-based Hardware Acceleration for Extreme Learning Machine
    Safaei, Amin
    Wu, Q. M. Jonathan
    Yang, Yimin
    Akilan, Thangarajah
    [J]. 2017 24TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (ICECS), 2017, : 470 - 473
  • [7] System-on-a-chip (SoC)-based hardware acceleration for foreground and background identification
    Safaei, Amin
    Wu, Q. M. Jonathan
    Yang, Yimin
    [J]. JOURNAL OF THE FRANKLIN INSTITUTE-ENGINEERING AND APPLIED MATHEMATICS, 2018, 355 (04): : 1888 - 1912
  • [8] Guest editorial: System-on-a-chip for multimedia systems
    Chen, YK
    Wen, SKA
    Lee, CY
    [J]. JOURNAL OF VLSI SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, 2005, 41 (01): : 5 - 7
  • [9] Guest Editorial: System-on-a-Chip for Multimedia Systems
    Yen-Kuang Chen
    Stella Kuei-Ann Wen
    Chen-Yi Lee
    [J]. Journal of VLSI signal processing systems for signal, image and video technology, 2005, 41 : 5 - 7
  • [10] Partnership for system-on-a-chip design
    不详
    [J]. COMPUTER DESIGN, 1997, 36 (08): : 66 - 66