A Currentless Sorting and Selection-Based Capacitor-Voltage-Balancing Method for Modular Multilevel Converters

被引：95
|
作者：
Hu, Pengfei [1 ]
Teodorescu, Remus [2 ]
Wang, Songda [2 ]
Li, Shuqi [3 ]
Guerrero, Josep M. [2 ]
机构：
[1] Univ Elect Sci & Technol China, Sch Mech & Elect Engn, Chengdu 610054, Sichuan, Peoples R China
[2] Aalborg Univ, Dept Energy Technol, DK-9220 Aalborg, Denmark
[3] State Grid Sichuan Elect Power Res Inst, Chengdu 610041, Sichuan, Peoples R China
来源：
IEEE TRANSACTIONS ON POWER ELECTRONICS | 2019年 / 34卷 / 02期
关键词：
Capacitor voltage balancing; currentless sorting and selection (SAS); experiments; modular multilevel converter (MMC);
D O I：
10.1109/TPEL.2018.2850360
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This letter proposes a currentless sorting and selection (SAS)-based capacitor-voltage-balancing method for modular multilevel converters. Without the knowledge of arm-current signals, this method has almost the same performance as the conventional SAS method while reducing the sampling signals, compacting the control system, and saving the overall cost. In this letter, the derivative of the total capacitor voltage of an arm, instead of the arm current, is employed to determine which submodules should be inserted or bypassed. Furthermore, the efficacy of the proposed method is verified by experimental results.
引用
收藏
页码：1022 / 1025
页数：4
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