Compensation control and parameters design for high frequency resonance suppression of MMC-HVDC system

Large time delay is one of the inherent features of a modular multilevel converter (MMC)-based high voltage direct current (HVDC) system and is the main factor leading to the unfavorable 'negative resistance and inductance' characteristic of MMC impedance. Research indicates that this characteristic interacting with the capacitive characteristics of an AC system is the cause of high frequency resonance (HFR) in the Yu-E HVDC project. As the current controller is one of the main factors that affects the MMC impedance, a compensation control to imitate the paralleled impedance at the point of common coupling (PCC) is proposed. Therefore, the structure and parameter design of the compensation controller are core to realizing HFR suppression. There are two potentially risky frequency ranges of HFRs (around 700 Hz and 1.8 kHz) in the studied AC system within 2.0 kHz. The core concept of HFR suppression is to make the phase angle of MMC impedance smaller than 90 degrees in the two risky frequency ranges according to impedance stability theory. Hence, the design parameters aim to coordinate the phase angle of MMC impedance in the two risky frequency ranges. In this paper, three types of compensation controller are studied to suppress HFRs, namely, first-order low pass filter (LPF), second-order LPF, and third-order band pass filter. The results of parameter design show that the first-order LPF cannot suppress both HFRs simultaneously. The second-order LPF can suppress both HFRs, however, it introduces a DC component into the current control loop. Therefore, a high pass filter is added to form the recommended third-order controller. All parameter ranges of the compensation controller are derived using analytical expressions. Finally, the correctness of the parameter design is proofed using time-domain simulations.