Analysis of On-Chip Digital Noise Coupling Path for Wireless Communication IC Test Chip

被引：0

作者：

Tanaka, Satoshi ^{[1
]}

Fan, Peng ^{[1
]}

Ma, Jingyan ^{[1
]}

Aoki, Hanae ^{[1
]}

Yamaguchi, Masahiro ^{[1
]}

Nagata, Makoto ^{[2
]}

Muroga, Sho ^{[3
]}

机构：

[1] Tohoku Univ, Dept Elect Engn, Sendai, Miyagi, Japan

[2] Kobe Univ, Grad Sch Syst Informat, Kobe, Hyogo, Japan

[3] Toyota Coll, Natl Inst Technol, Dept Elect & Elect Engn, Toyota, Japan

来源：

2015 10th International Workshop on the Electromagnetic Compatibility of Integrated Circuits | 2015年

关键词：

wireless communication; RF IC; digital noise; magnetic thin film; noise suppressor; conduction noise; FILMS; ANISOTROPY;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In-band spurious tones of a LTE-class radio frequency integrated circuit (RFIC) receiver test element group (TEG) chip was studied in order to evaluate the degree of noise suppression by means of soft magnetic thin film. A 2-mu m-thick crossed anisotropy multilayered Co-Zr-Nb film was appllied onto the passivation layer of TEG chip. The in-band spurious was suppressed by 10 dB while it had no influence upon wanted signal. A magnetic near field map measured in the 2.1 GHz range indicated several noise coupling paths on chip, which were compared with the chip layout design to estimate victim wires. EM simulation model in connection with circuit simulation is carefully constructed. RF control wirings were most responsible wires than other wires and air couplings. EM simulation predicted the magnetic film should suppress noise by the maximum of 33 dB while it was 10 dB experimentally because of Si substrate coupling and board coupling.

引用

页码：216 / 221

页数：6

共 50 条

[1] On-Chip Magnetic Thin-Film Noise Suppressor for IC Chip Level Digital Noise Countermeasure
Yamaguchi, Masahiro
Endo, Yasushi
Tanaka, Satoshi
Ito, Tetsuo
Muroga, Sho
Azuma, Naoya
Nagata, Makoto
[J]. 2014 INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY, TOKYO (EMC'14/TOKYO), 2014, : 354 - 357
[2] On-Chip and On-Board RF Noise Coupling and Impacts on LTE Wireless Communication Performance
Nagata, Makoto
Miura, Noriyuki
Muroga, Sho
Tanaka, Satoshi
Yamaguchi, Masahiro
[J]. 2015 IEEE INTERNATIONAL SYMPOSIUM ON RADIO-FREQUENCY INTEGRATION TECHNOLOGY (RFIT), 2015, : 7 - 9
[3] Wireless Network-on-Chip Analysis of Propagation Technique for On-chip Communication
Pano, Vasil
Yilmaz, Isikcan
Liu, Yuqiao
Taskin, Baris
Dandekar, Kapil
[J]. PROCEEDINGS OF THE 34TH IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN (ICCD), 2016, : 400 - 403
[4] Noise coupling to on-chip integrated antennas
Dickson, TO
Bravo, DF
Mehta, J
O, KK
[J]. 2002 IEEE INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY, VOLS 1 AND 2, SYMPOSIUM RECORD, 2002, : 340 - 344
[5] Analysis of intra-chip degital noise coupling path in fully LTE compliant RF receiver test chip
Yamaguchi, Masahiro
Fan, Peng
Tanaka, Satoshi
Nagata, Makoto
Muroga, Sho
[J]. 2015 IEEE INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY (EMC), 2015, : 1007 - 1011
[6] Wireless Interconnects Enabled On-Chip Multicast Communication
Li, Baoliang
Lu, Jia
Sun, Jiahui
He, Lei
Dou, Wenhua
[J]. 2012 11TH INTERNATIONAL SYMPOSIUM ON DISTRIBUTED COMPUTING AND APPLICATIONS TO BUSINESS, ENGINEERING & SCIENCE (DCABES), 2012, : 135 - 138
[7] Digital-noise reduction with on-chip inductors
M. -O. Dima
K. -H. Becks
[J]. Instruments and Experimental Techniques, 2006, 49 : 361 - 370
[8] Digital-noise reduction with on-chip inductors
Dima, M. -O.
Becks, K. -H.
[J]. INSTRUMENTS AND EXPERIMENTAL TECHNIQUES, 2006, 49 (03) : 361 - 370
[9] On-chip microwave test circuits for production IC measurements
Eisenstadt, WR
Fox, RM
Yin, QZ
Yoon, JS
Zhang, T
[J]. Digital Communications Systems Metrics, 2004, : 213 - 219
[10] On-chip test circuit for measuring substrate and line-to-line coupling noise
Xu, WZ
Friedman, EG
[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2006, 41 (02) : 474 - 482

← 1 2 3 4 5 →