Architecture for an elliptic curve scalar multiplication resistant to some side-channel attacks

This paper describes a design of an elliptic curve scalar multiplication and finite field arithmetic. The scalar multiplication design resists to Simple Power Analysis(SPA) and solves performance problem induced by SPA countermeasure. Izu and Takagi[9] proposed a parallel multiplication method resistant against SPA. When it is implemented in parallel with two processors, the computing time for n-bit scalar multiplication is 1.(point doubling) + (n - 1) -(point addition). Although our design uses one multiplier and one inverter for finite field operation, it takes 2n(.)(inversion) to compute n-bit scalar multiplication. If our algorithm utilizes two processors, the computation time is n(point addition) which is almost same as Izu and Takagi's result. The proposed inverter is resistant to Timing Analysis(TA) and Differential Power Analysis(DPA). Lopez and Dahab[13] argued that for GF(2(n)), projective coordinates perform better than the affine coordinates do when inversion operation is more than 7 times slower than the multiplication operation. Speed ratio of the proposed inverter to the proposed multiplier is 6. Thus, the proposed architecture is efficient on the affine coordinates.