16-bit floating point instructions for embedded multimedia applications

被引:0
|
作者
Lacassagne, L [1 ]
Etiemble, D [1 ]
Kablia, SAO [1 ]
机构
[1] Univ Paris Sud, Inst Elect Fondamentale, Paris, France
关键词
16-bit floating point instructions; SIMD extensions; vision and multimedia; embedded processors and applications;
D O I
暂无
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
We have simulated the implementation of 16-bit floating point instructions on a Pentium4 and PowerPC G4 and G5 to evaluate the performance impact of these instructions in embedded processors for graphics and multimedia applications. Both accuracy of the computations and the execution time have been considered. For low-end embedded processors, the 16-bit FP instructions deliver a larger dynamic range than 16-bit integer with the same memory footprint. For high-end embedded processors, we add the speed up coming from wider SIMD instructions.
引用
收藏
页码:198 / 203
页数:6
相关论文
共 50 条
  • [1] Customizing 16-bit floating point instructions on a NIOSII processor for FPGA image and media processing
    Etiemble, D
    Bouaziz, S
    Lacassagne, L
    [J]. PROCEEDINGS OF THE 2005 3RD WORKSHOP ON EMBEDDED SYSTEMS FOR REAL-TIME MULTIMEDIA, 2005, : 61 - 66
  • [2] Variable Precision 16-Bit Floating-Point Vector Unit for Embedded Processors
    Nannarelli, Alberto
    [J]. 2020 IEEE 27TH SYMPOSIUM ON COMPUTER ARITHMETIC (ARITH), 2020, : 96 - 102
  • [3] A cost-effective 16-bit embedded flash MCU for digital multimedia applications
    Kwon, MD
    Seo, SH
    Kim, IK
    [J]. PROCEEDINGS OF THE SECOND IEEE ASIA PACIFIC CONFERENCE ON ASICS, 2000, : 339 - 342
  • [4] 16-bit MCUs take on complex embedded applications
    Mayer, JH
    [J]. COMPUTER DESIGN, 1997, 36 (01): : 116 - &
  • [5] A 16-bit Architecture of Advanced Encryption Standard for Embedded Applications
    Ali, Imran
    Raja, Gulistan
    Khan, Ahmad Khalil
    [J]. PROCEEDINGS OF 2014 12TH INTERNATIONAL CONFERENCE ON FRONTIERS OF INFORMATION TECHNOLOGY, 2014, : 220 - 225
  • [6] 16-bit embedded web server
    Ramakrishnan, A
    [J]. PROCEEDINGS OF THE ISA/IEEE SENSORS FOR INDUSTRY CONFERENCE, 2004, : 187 - 193
  • [7] IMPLEMENTATION OF 16-BIT FLOATING POINT MULTIPLIER USING RESIDUE NUMBER SYSTEM
    Samhitha, Naamatheertham R.
    Cherian, Neethu Acha
    Jacob, Pretty Mariam
    Jayakrishnan, P.
    [J]. 2013 INTERNATIONAL CONFERENCE ON GREEN COMPUTING, COMMUNICATION AND CONSERVATION OF ENERGY (ICGCE), 2013, : 195 - 198
  • [8] A New Class of Floating-Point Data Formats with Applications to 16-Bit Digital-Signal Processing Systems
    Richey, Manuel
    Saiedian, Hossein
    [J]. IEEE COMMUNICATIONS MAGAZINE, 2009, 47 (07) : 94 - 101
  • [9] An Approach for Matrix Multiplication of 32-Bit Fixed Point Numbers by Means of 16-Bit SIMD Instructions on DSP
    Safonov, Ilia
    Kornilov, Anton
    Makienko, Daria
    [J]. ELECTRONICS, 2023, 12 (01)
  • [10] Enhancing the performance of 16-bit code using augmenting instructions
    Krishnaswamy, A
    Gupta, R
    [J]. ACM SIGPLAN NOTICES, 2003, 38 (07) : 254 - 264