Adaptive library-based performance-based OPC for VLSI circuit

被引:0
|
作者
Teh, Siew-Hong [1 ]
Heng, Chun-Huat [1 ]
Tay, Arthur [1 ]
机构
[1] Natl Univ Singapore, Dept Elect & Comp Engn, Singapore 117576, Singapore
关键词
Device performance; OPC; non-rectangular transistor; design-process integration; mask design;
D O I
10.1117/12.814116
中图分类号
TB3 [工程材料学];
学科分类号
0805 ; 080502 ;
摘要
Model-based full chip OPC approach contributes to substantial mask data expansion and prohibitive computational effort. The mask complexity issue has been addressed by exploiting the design intent into the existing model-based OPC flow. A device performance-based OPC (DPB-OPC) algorithm which operates based on parametric current, rather than desired layout pattern as in conventional OPC, has shown promising results in achieving considerable mask data saving as well as improved circuit performance matching. Despite this, the performance gain is currently limited by the comparatively longer runtime. To improve runtime efficiency of the previous work, we present an adaptive library-based DPB-OPC methodology for VLSI digital circuit in the paper. In particular, cell-wise OPC concept is deployed to explore its merit of runtime saving. To counteract the performance degradation shift that caused by different surrounding environment, a localized DPB-OPC refinement can be selectively performed. When compared to full chip OPC, runtime reduction of up to 40X is achieved in the ISCAS' 85 benchmark design.
引用
收藏
页数:10
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