Improving the barrier ability of Ti in Cu through-silicon vias through vacuum annealing

Suppressing leak current and blocking Cu diffusion into active Si from Cu through-silicon vias (TSVs) are important requirements for enhancing three-dimensional (3D) LSI performance and reliability. We have proposed and confirmed a cost effective means of enhancing the barrier property of sputtered Ti in high-aspect-ratio Cu-TSVs by simple vacuum annealing at 400 degrees C for 20 min. The self-formed amorphous TiSi2 at the interface between dielectric SiO2 (along the TSV side-wall) and barrier Ti layer is found to play a positive role in improving the leak current characteristics. As-formed TiSix was partially converted into TiO2 and SiO2 during the vacuum annealing above 200 degrees C, and nearly vanished after annealing at 400 degrees C. The immense importance of 400 degrees C vacuum-annealing is not only in terms of the improvement in the barrier characteristics of the Ti layer, but also it is being a prerequisite for preventing Cu popup in 3D-LSI. Both the X-ray photoelectron spectroscopy (XPS) and current-voltage (I-V) data clearly reveal that this simple vacuum annealing of Cu-TSVs at 400 degrees C has tremendous potential for implementation in cost-effective via-last 3D integration. (C) 2017 The Japan Society of Applied Physics