Performance pathologies in hardware transactional memory

被引：7

作者：

Bobba, Jayaram ^{[1
]}

Moore, Kevin E. ^{[1
]}

Volos, Haris ^{[1
]}

Yen, Luke ^{[1
]}

Hill, Mark D. ^{[2
]}

Swift, Michael M. ^{[3
]}

Wood, David A. ^{[2
]}

机构：

[1] Univ Wisconsin, Madison, WI 53706 USA

[2] Univ Wisconsin, Dept Comp Sci, Dept Elect & Comp Engn, Madison, WI 53706 USA

[3] Univ Wisconsin, Dept Comp Sci, Madison, WI 53706 USA

来源：

IEEE MICRO | 2008年 / 28卷 / 01期

基金：

美国国家科学基金会;

关键词：

Conflict detection; Conflict resolution; Hardware transactional memory; Pathology; Transactional memory; Version management;

D O I：

10.1109/MM.2008.11

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Transactional memory is a promising approach to ease parallel programming. Hardware transactional memory system designs reflect choices along three key design dimensions: conflict detection, version management, and conflict resolution. The authors identify a set of performance pathologies that could degrade performance in proposed htm designs. improving conflict resolution could eliminate these pathologies so designers can build robust htm systems.

引用

页码：32 / 41

页数：10

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