Pipelined delay-sum architecture based on bucket-brigade devices for on-chip ultrasound beamforming

被引：11

作者：

Mo, YW ^{[1
]}

Tanaka, T ^{[1
]}

Arita, S ^{[1
]}

Tsuchitani, A ^{[1
]}

Inoue, K ^{[1
]}

Suzuki, Y ^{[1
]}

机构：

[1] Technol Res Inst Osaka Prefecture, Osaka 5941157, Japan

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 2003年 / 38卷 / 10期

关键词：

beamforming; delay lines; image sensors; phased arrays; ultrasonic devices;

D O I：

10.1109/JSSC.2003.817603

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A pipelined delay-sum, architecture based on bucket-brigade devices is proposed as an analog beamformer for integrated far-field steering scanning of a micromachined piezoelectric ultrasonic sensor phased array. The prototype beamformer, fabricated with an 8-mum standard CMOS process, exhibits a total harmonic distortion of -45 dB, dynamic range of more than 6.5 dB, and beamforming imperfection of less than -50 dB using a 100-kHz input signal with peak voltage of 400 mV.

引用

页码：1754 / 1757

页数：4

共 7 条

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