SVERTS - Specification and validation of real-time and embedded systems

被引:0
|
作者
Graf, S [1 ]
Haugen, O
Ober, I
Selic, B
机构
[1] VERIMAG, Grenoble, France
[2] Univ Oslo, Oslo, Norway
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D O I
暂无
中图分类号
TP31 [计算机软件];
学科分类号
081202 ; 0835 ;
摘要
This paper presents an overview on the workshop on Specification and Validation of Real-time and embedded Systems that has taken place for the second time in association with the UML 2004 conference. The main themes discussed at this year's workshop concerned modeling of real-time features with the perspective of validation as well as some particular validation issues.
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页码:33 / 42
页数:10
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