Non-Concatenated FEC Codes for Ultra-High Speed Optical Transport Networks

被引:0
|
作者
Morero, Damian A. [1 ,2 ]
Alejandro Castrillon, M. [1 ]
Ramos, Facundo A. [2 ]
Goette, Teodoro A. [2 ]
Agazzi, Oscar E. [3 ]
Hueda, Mario R. [1 ]
机构
[1] Univ Nacl Cordoba, Lab Comunicac Digitales, CONICET, Av Velez Sarsfield 1611,X5016GCA, RA-5000 Cordoba, Argentina
[2] ClariPhy Argentina SA, RA-5000 Cordoba, Argentina
[3] ClariPhy Commun Inc, 7585 Irvine Ctr Dr, Irvine, CA 92618 USA
来源
2011 IEEE GLOBAL TELECOMMUNICATIONS CONFERENCE (GLOBECOM 2011) | 2011年
关键词
DECODERS; DESIGN;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents a non-concatenated forward error correction (FEC) code suitable for applications in 100Gb/s optical transport networks (OTN). A typical requirement in this application is a net coding gain (NCG) > 10dB at a bit error rate (BER) of 10(-15) with an overhead (OH) of similar to 20%. As discussed in [1], non-concatenated codes are the ultimate frontier in terms of performance for OTN applications, because of their superior performance, lower latency, and lower overhead than concatenated codes. However, a major stumbling block for the use of these codes has been the existence of BER floors at levels significantly higher than the required 10(-15) (typically 10(-10)). In this paper we present a new coding scheme based on a low density parity check (LDPC) code with an expected net coding gain of 11.30dB at 10(-15), 20% OH, and a codeword length of 24576 bits. This represents a significant improvement over the previous state of the art [2], based on a concatenated code with a codeword length of 74844 bits and 20.5% OH. The code is designed to minimize the BER floor while simultaneously reducing the memory requirements and the interconnection complexity of the iterative decoder [3]. Experimental results obtained with an FPGA-based hardware emulator demonstrate an NCG of 10.70dB at a BER of 10(-13) and no error floors. These experimental results are extrapolated to 10(-15) using importance sampling techniques, resulting in the expected performance stated above. Moreover, we find that fixed-point implementation is the main cause of error floors below 10(-13). Based on this finding, we introduce a new low complexity postprocessing technique to push BER floors down to 10(-15).
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页数:5
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