Real-time synthesis of sparsely interconnected neural associative memories

被引：2

作者：

Chan, HY ^{[1
]}

Zak, SH ^{[1
]}

机构：

[1] Purdue Univ, Sch Elect & Comp Engn, W Lafayette, IN 47907 USA

来源：

NEURAL NETWORKS | 1998年 / 11卷 / 04期

关键词：

associative memory; Brain-State-in-a-Box (BSB) neural model; cellular architecture; partial connectivity;

D O I：

10.1016/S0893-6080(98)00015-X

中图分类号：

TP18 [人工智能理论];

学科分类号：

081104 ; 0812 ; 0835 ; 1405 ;

摘要：

The problem of implementing associative memories using sparsely interconnected generalized Brain-State-in-a-Box (gBSB) network is addressed in this paper. In particular, a ''designer'' neural network that synthesizes the associative memories is proposed. An upper bound on the time required for the designer network to reach a solution is determined. A neighborhood criterion with toroidal geometry for the cellular gBSB network is analyzed, in which the number of adjacent cells is independent of the generic cell location. A design method of neural associative memories with prespecified interconnecting weights is presented. The effectiveness of the proposed synthesis method is demonstrated with numerical examples. (C) 1998 Elsevier Science Ltd. All rights reserved.

引用

页码：749 / 759

页数：11

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