Case study of ATPG-based bounded model checking: Verifying USB2.0 IP core

被引：1
|
作者：
Qiang, Q [1 ]
Chang, CL [1 ]
Saab, DG [1 ]
Abraham, JA [1 ]
机构：
[1] Case Western Reserve Univ, Cleveland, OH 44106 USA
来源：
2005 IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN: VLSI IN COMPUTERS & PROCESSORS, PROCEEDINGS | 2005年
关键词：
D O I：
10.1109/ICCD.2005.36
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
This paper presents the ATPG performances of verifying USB2.0 IP core. Using the USB protocol and typical properties, the ATPG-based bounded model checking mechanism is revealed. Heuristics to accelerate the ATPG search are presented and their impacts are analyzed. We feel that results from this case study are applicable to serial communication circuits of the same family and can be scaled to industrial-sized circuits.
引用
收藏
页码：461 / 463
页数：3
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