Low Power High Data Rate GHz Range Receiver in 40nm CMOS Technology

被引：0

作者：

Yu, XiaoPeng ^{[1
]}

Lu, ZhengHao ^{[2
]}

Lim, Wei Meng ^{[2
]}

Yeo, Kiat Seng ^{[2
]}

Liu, Yang ^{[2
]}

Yan, X. L. ^{[1
]}

Hu, Changhui ^{[3
]}

机构：

[1] Zhejiang Univ, Inst VLSI Design, Hangzhou 310027, Zhejiang, Peoples R China

[2] Nanyang Technol Univ, Sch EEE, Singapore 639798, Singapore

[3] Marvell Semicond, Santa Clara, CA 95054 USA

来源：

2011 INTERNATIONAL CONFERENCE OF ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC) | 2011年

基金：

中国国家自然科学基金;

关键词：

Injection locking; nanoscale CMOS; OOK Receiver;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper, a low power high data rate OOK receiver at GHz range is proposed. An injected locked ring oscillator based local oscillator is used for data demodulation. Implemented with a standard 40nm CMOS process, the receiver is able to recover an input signal with 1-4 GHz carrier frequency at the data rate of 50 Mbps while consuming less than 300 mu W.

引用

页数：2

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