Data cache and direct memory access in programming mediaprocessors

被引:32
|
作者
Kim, D
Managuli, R
Kim, Y
机构
[1] Univ Washington, Dept Elect Engn, Seattle, WA 98195 USA
[2] Univ Washington, Dept Bioengn, Seattle, WA 98195 USA
关键词
D O I
10.1109/40.946678
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Mediaprocessors provide high performance by using both instruction- and data-level parallelism. Because of the increased computing power, transferring data between off- and on-chip memories without slowing down the core processor's performance is challenging. Two methods, data cache and direct memory access, address this problem in different ways.
引用
收藏
页码:33 / 42
页数:10
相关论文
共 50 条
  • [1] PROGRAMMING DIRECT MEMORY ACCESS DATA ACQUISITION
    WENTZELL, PD
    VANSLYKE, SJ
    WADE, AP
    [J]. TRAC-TRENDS IN ANALYTICAL CHEMISTRY, 1990, 9 (01) : 3 - 8
  • [2] Cache or Direct Access? Revitalizing Cache in Heterogeneous Memory File System
    Liu, Yubo
    Ren, Yuxin
    Liu, Mingrui
    Guo, Hanjun
    Miao, Xie
    Hu, Xinwei
    [J]. PROCEEDINGS OF THE 2023 1ST WORKSHOP ON DISRUPTIVE MEMORY SYSTEMS, DIMES 2023, 2023, : 38 - 44
  • [3] Access-aware In-memory Data Cache Middleware for Relational Databases
    Ma, Kun
    Yang, Bo
    [J]. 2015 IEEE 17TH INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE COMPUTING AND COMMUNICATIONS, 2015 IEEE 7TH INTERNATIONAL SYMPOSIUM ON CYBERSPACE SAFETY AND SECURITY, AND 2015 IEEE 12TH INTERNATIONAL CONFERENCE ON EMBEDDED SOFTWARE AND SYSTEMS (ICESS), 2015, : 1506 - 1511
  • [4] eTag: Tag-Comparison in Memory to Achieve Direct Data Access based on eDRAM to Improve Energy Efficiency of DRAM Cache
    Yang, Keng-Hao
    Tsai, Hsiang-Jen
    Li, Chia-Yin
    Jendra, Paul
    Chang, Meng-Fan
    Chen, Tien-Fu
    [J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2017, 64 (04) : 858 - 868
  • [5] DIRECT MEMORY ACCESS TECHNIQUES FOR DATA ACQUISITION ON THE PC BUS
    DANIEL, RA
    [J]. CONTROL ENGINEERING, 1987, 34 (06) : 84 - 85
  • [6] METHOD OF DATA ARRAY ORGANIZATION IN DIRECT-ACCESS MEMORY
    GARMASH, II
    KAZAKOV, BS
    LEVITAN, VD
    FARBER, MS
    [J]. AUTOMATION AND REMOTE CONTROL, 1979, 40 (01) : 135 - 139
  • [7] CART: Cache Access Reordering Tree for Fiticient Cache and Memory Accesses in GPUs
    Gu, Yongbin
    Chen, Lizhong
    [J]. 2018 IEEE 36TH INTERNATIONAL CONFERENCE ON COMPUTER DESIGN (ICCD), 2018, : 250 - 257
  • [8] Cache access pattern based algorithm for performance improvement of cache memory management
    [J]. 1600, World Scientific and Engineering Academy and Society, Ag. Ioannou Theologou 17-23, Zographou, Athens, 15773, Greece (10):
  • [9] A cache locking and direct cache access based network processing optimization method
    State Key Laboratory of Computer Architecture, Institute of Computing Technology, Chinese Academy of Sciences, Beijing 100190, China
    不详
    不详
    不详
    [J]. Jisuanji Yanjiu yu Fazhan, 3 (681-690):
  • [10] An object based data cache with conflict free concurrent access as shared memory for a parallel DSP
    Kneip, J
    Pirsch, P
    [J]. VLSI SIGNAL PROCESSING, IX, 1996, : 25 - 34