Wafer level flip chip packaging

被引:0
|
作者
Tong, QK [1 ]
Ma, B [1 ]
Savoca, A [1 ]
机构
[1] Natl Starch & Chem Co, Bridgewater, NJ 08807 USA
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
引用
收藏
页码:244 / 244
页数:1
相关论文
共 50 条
  • [1] Wafer level packaging of RF mems for flip chip assembly
    Wei, J
    Lok, BK
    Lim, PC
    Nai, ML
    Lu, HJ
    Lai, FK
    Wong, CK
    [J]. ELECTRONIC AND PHOTONIC PACKAGING, ELECTRICAL SYSTEMS AND PHOTONIC DESIGN AND NANOTECHNOLOGY - 2003, 2003, : 119 - 123
  • [2] Materials challenges for wafer-level flip chip packaging
    Ma, BD
    Tong, QK
    Zhang, E
    Kong, SH
    Savoca, A
    [J]. 50TH ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE - 2000 PROCEEDINGS, 2000, : 170 - 174
  • [3] Wafer level packaging of a tape flip-chip chip scale packages
    Hotchkiss, G
    Amador, G
    Edwards, D
    Hundt, P
    Stark, L
    Stierman, R
    Heinen, G
    [J]. MICROELECTRONICS RELIABILITY, 2001, 41 (05) : 705 - 713
  • [4] Flip chip wafer level packaging of a flexible chip scale package (CSP)
    Hotchkiss, G
    Amador, G
    Edwards, D
    Hundt, P
    Stark, L
    Stierman, R
    Heinen, G
    [J]. 1999 INTERNATIONAL SYMPOSIUM ON MICROELECTRONICS, PROCEEDINGS, 1999, 3906 : 555 - 562
  • [5] Recent advances on a wafer-level flip chip packaging process
    Tong, Q
    Ma, B
    Zhang, E
    Savoca, A
    Nguyen, L
    Quentin, C
    Luo, S
    Li, H
    Fan, L
    Wong, CP
    [J]. 50TH ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE - 2000 PROCEEDINGS, 2000, : 101 - 106
  • [6] FLIP CHIP PACKAGING OF WAFER LEVEL ENCAPSULATED RF MEMS TUNABLE CAPACITORS
    Cunningham, Shawn J.
    Heng, Yvonne
    Idrisi, Nabeel
    Nelson, Brad
    McKillop, John
    [J]. PROCEEDINGS OF THE ASME INTERNATIONAL TECHNICAL CONFERENCE AND EXHIBITION ON PACKAGING AND INTEGRATION OF ELECTRONIC AND PHOTONIC MICROSYSTEMS, 2013, VOL 1, 2014,
  • [7] Silicon Based Wafer-level Packaging for Flip-chip LEDs
    Chen, Dong
    Zhang, Li
    Chen, Haijie
    Tan, K. H.
    Lai, C. M.
    [J]. 2015 16TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY, 2015,
  • [8] Wafer scale packaging based on underfill applied at wafer level for low cost flip chip processing
    Johnson, CD
    Baldwin, DF
    [J]. 1999 INTERNATIONAL CONFERENCE ON HIGH DENSITY PACKAGING AND MCMS, PROCEEDINGS, 1999, 3830 : 371 - 375
  • [9] Wafer scale packaging based on underfill applied at the wafer level for low-cost flip chip processing
    Johnson, CD
    Baldwin, DF
    [J]. 49TH ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE - 1999 PROCEEDINGS, 1999, : 950 - 954
  • [10] Flip chip assembly with wafer level NCF
    Kobayashi, Yuta
    Nonaka, Toshihisa
    [J]. 2014 INTERNATIONAL CONFERENCE ON ELECTRONICS PACKAGING (ICEP), 2014, : 122 - 125