Design for Manufacturing of Low-Voltage Three-Dimensional Capacitors

被引:3
|
作者
Nongaillard, Matthieu [1 ]
Lallemand, Florent [1 ,2 ]
Allard, Bruno [1 ,2 ]
机构
[1] Inst Natl Sci Appl, Ampere Lab, F-69621 Villeurbanne, France
[2] IPDiA, F-14000 Caen, France
关键词
Capacitors; design for manufacturing; three dimensional integrated circuits;
D O I
10.1109/TDMR.2010.2058114
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Given an existing manufacturing technology, the influence of the design parameters has been evaluated in order to improve the robustness of the 3-D capacitors. The objective is to select the capacitor patterns that provide a satisfying density with the required robustness with respect to the reliability indicators. The geometrical and manufacturing-related issues are both considered. The main manufacturing issues are the etching, deposition, and warpage of the wafer. The improvements have been observed experimentally for the robustness of the 3-D structures and the density of the capacitor which are increased for several proposed 3-D patterns. All capacitors tested in this paper are realized with PICS technology.
引用
收藏
页码:396 / 402
页数:7
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