Synchronous Digital Implementation of the AER Communication Scheme for Emulating Large-Scale Spiking Neural Networks Models

被引：5
|
作者：
Moreno, J. M. [1 ]
Madrenas, J. [1 ]
Kotynia, L. [2 ]
机构：
[1] Tech Univ Catalunya, Dept Elect Engn, Barcelona, Spain
[2] Tech Univ Lodz, Dept Microelect & Comp Engn, PL-90924 Lodz, Poland
来源：
PROCEEDINGS OF THE 2009 NASA/ESA CONFERENCE ON ADAPTIVE HARDWARE AND SYSTEMS | 2009年
关键词：
D O I：
10.1109/AHS.2009.14
中图分类号：
TP301 [理论、方法];
学科分类号：
081202 ;
摘要：
In this paper we shall present a fully synchronous digital implementation of the Address Event Representation (AER) communication scheme that has been used in the PERPLEXUS chip in order to permit the emulation of large-scale biologically inspired spiking neural networks models. By introducing specific commands in the AER protocol it is possible to distribute the AER bus among a large number of chips where the functionality of the spiking neurons is being emulated. A careful design of the AER encoder module using compact Content Addressable Memories (CAMs) allows for a feasible realization of large-scale models.
引用
收藏
页码：189 / +
页数：3
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