A novel PV fed asymmetric multilevel inverter with reduced THD for a grid-connected system

被引:23
|
作者
Shunmugham Vanaja, Dishore [1 ]
Stonier, Albert Alexander [2 ]
机构
[1] Narayanaguru Coll Engn, Dept Elect & Elect Engn, Kanniyakumari, India
[2] Kongu Engn Coll, Dept Elect & Elect Engn, Erode, India
关键词
DC SOURCES; TOPOLOGY; VOLTAGE; NUMBER; DESIGN; MODULE;
D O I
10.1002/2050-7038.12267
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents a novel design of an asymmetric multilevel inverter with a very few semiconductor switches for a single-phase grid-connected photovoltaic (PV) system. The proposed structure consists of 14 switches and five direct current (DC) sources to produce 27 levels. The proposed structure when connected in the cascaded form generates more voltage levels. The proposed topology is superior to other multilevel inverter topologies because of its structure. It does not need any extra circuit or polarity generation circuit (H-bridge) to come up with the negative levels. Since the proposed topology uses 5 DC sources, it can be applicable in photovoltaic farms for producing higher voltages. An efficient controller is implemented for the grid-connected system. For obtaining high-quality output voltage with less total harmonic distortion (THD), the pulses to the proposed inverter are obtained using selective harmonic elimination (SHE) technique. The performance of the proposed inverter is simulated and tested under steady-state and transient conditions. A prototype of the proposed inverter is developed and investigated using a 1 - kW(p) solar PV plant. Simulation and experimental results prove that the proposed inverter reduces the harmonics and satisfies the IEEE519 standards.
引用
收藏
页数:25
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