High-Throughput Rapid Single-Flux-Quantum Circuit Implementations for Exponential and Logarithm Computation Using the Radix-2 Signed-Digit Representation

被引:0
|
作者
Tanaka, Masamitsu [1 ]
Takagi, Kazuyoshi [2 ]
Takagi, Naofumi [2 ]
机构
[1] Nagoya Univ, Grad Sch Engn, Nagoya, Aichi 4648603, Japan
[2] Kyoto Univ, Grad Sch Informat, Kyoto 6068501, Japan
来源
IEICE TRANSACTIONS ON ELECTRONICS | 2016年 / E99C卷 / 06期
关键词
digital arithmetic; digit-serial processing; hardware algorithm; rapid single-flux-quantum logic; signed-digit representation; systolic array; ALGORITHM;
D O I
10.1587/transele.E99.C.703
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
We present circuit implementations for computing exponentials and logarithms suitable for rapid single-flux-quantum (RSFQ) logic. We propose hardware algorithms based on the sequential table-lookup (STL) method using the radix-2 signed-digit representation that achieve high-throughput, digit-serial calculations. The circuits are implemented by processing elements formed in systolic-array-like, regularly-aligned pipeline structures. The processing elements are composed of adders, shifters, and readouts of precomputed constants. The iterative calculations are fully overlapped, and throughputs approach the maximum throughput of serial processing. The circuit size for calculating significand parts is estimated to be approximately 5-10 times larger than that of a bit-serial floating-point adder or multiplier.
引用
收藏
页码:703 / 709
页数:7
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