We report a design and implementation of lateral silicon photodetectors fabricated on a silicon-on-insulator (SOI) substrate in a complementary CMOS-compatible process. In addition, we disscuss the structure dependences on the frequency and optimum design for a maximum bandwidth. A standard device fabricated with a 210nm absorbing layer, a finger width of 1.00 mu m, a finger spacing of 1.63 mu m, a square detector area of 20 x 20 mu m(2), and a pad size of 60 x 60 mu m(2) achieved a bandwidth of 12.6GHz at a bias voltage of 10 V, with a responsivity of 7.5mA/Wat 850nm wavelength. A photodetector with the same geometry, which was fabricated with a smaller pad size of 30 x 30 mu m(2), exhibited a bandwidth of 13.6GHz. (C) 2015 The Japan Society of Applied Physics