Memory-Aware Tiles Workload Balance through Machine-Learnt Complexity Reduction for HEVC

被引：0

作者：

Storch, Iago ^{[1
]}

Zatt, Bruno ^{[1
]}

Agostini, Luciano ^{[1
]}

Correa, Guilherme ^{[1
]}

Palomino, Daniel ^{[1
]}

机构：

[1] Univ Fed Pelotas, Video Technol Res Grp ViTech, Pelotas, Brazil

来源：

2018 25TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (ICECS) | 2018年

关键词：

Parallel video coding; Workload balance; Speedup; Machine learning; Memory-aware video coding;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper proposes a workload balancing algorithm aiming to speed up the HEVC parallel encoding using Tiles. Different from other literature works, the proposed solution uses static uniform tiling to avoid memory management difficulties that may emerge when dynamic tiling solutions are employed. The proposed algorithm relies on workload distribution history of previous frames to predict the workload distribution of the current frame. Then, it balances the workload among Tiles by employing a workload reduction scheme based on decision trees in the coding process. Experimental tests show that the proposed solution outperforms the standard uniform tiling and is competitive with related works in terms of speedup. Moreover, the solution optimizes resources usage in multiprocessing platforms, presents a negligible coding efficiency loss and reduces memory bandwidth usage by 9.34%.

引用

页码：521 / 524

页数：4