A FPGA implementation of a DCT-based digital Electrocardiographic signal compression device

被引：9

作者：

Pimentel, BS ^{[1
]}

Valgas, JHD ^{[1
]}

Campos, RL ^{[1
]}

Fernandes, AO ^{[1
]}

Coelho, CJN ^{[1
]}

机构：

[1] Univ Fed Minas Gerais, DCC UFMG, Dept Ciencia Comp, Belo Horizonte, MG, Brazil

来源：

14TH SYMPOSIUM ON INTEGRATED CIRCUITS AND SYSTEMS DESIGN, PROCEEDINGS | 2001年

关键词：

D O I：

10.1109/SBCCI.2001.953002

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

The use of portable Electrocardiographic (ECG) recording devices is directly dependent on the amount of physical memory available. Common recording techniques using enough bit encoding at a normal sampling rate can take as much as 80 Mbytes of storing space for a whole 24-hour period This paper describes a simplified implementation of a Discrete Cosine Transform (DCT) algorithm for digital signal compression to be implemented on a Field Programmable Gate Array (FPGA) device. Theoretic compression ratios of 7:1 are expected, enabling the use of portable 16-Mbyte non-volatile memory cards.

引用

页码：44 / 49

页数：6

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