Readout ASIC for ILC-FPCCD vertex detector

被引:5
|
作者
Takubo, Yosuke [1 ]
Miyamoto, Akiya [2 ]
Ikeda, Hirokazu [3 ]
Yamamoto, Hitoshi [1 ]
Itagaki, Kennosuke [1 ]
Nagamine, Tadashi [1 ]
Sugimoto, Yasuhiro [2 ]
机构
[1] Tohoku Univ, Dept Phys, Sendai, Miyagi 9808578, Japan
[2] High Energy Accelerator Res Org, KEK, Tsukuba, Ibaraki 3050801, Japan
[3] Japan Aerosp Explorat Agcy, Inst Space & Astronaut Sci, JAXI, Sagamihara, Kanagawa 2298510, Japan
关键词
CCD; Readout ASIC; ILC; Charge sharing ADC; CMOS;
D O I
10.1016/j.nima.2010.03.046
中图分类号
TH7 [仪器、仪表];
学科分类号
0804 ; 080401 ; 081102 ;
摘要
The concept of FPCCD (Fine Pixel CCD) whose pixel size is 5 x 5 mu m(2) has been proposed as vertex detector at ILC. Since FPCCD has 128 x 20,000 pixels in one readout channel, its readout poses a considerable challenge. We have developed a prototype of readout ASIC to readout the large number of pixels during the inter-train gap of the ILC beam. In this paper, we report the design and performance of the readout ASIC. (C) 2010 Published by Elsevier B.V.
引用
收藏
页码:489 / 491
页数:3
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