Pulse delay control for capacitor voltage balancing in a three-level boost neutral point clamped inverter

被引:32
|
作者
Krishna, Remya [1 ]
Soman, Deepak E. [1 ]
Kottayil, Sasi K. [2 ]
Leijon, Mats [1 ]
机构
[1] Uppsala Univ, Dept Engn Sci, SE-75121 Uppsala, Sweden
[2] Amrita Vishwa Vidyapeetham Univ, Dept Elect Engn, Coimbatore, Tamil Nadu, India
关键词
invertors; DC-DC power convertors; PI control; control system synthesis; field programmable gate arrays; digital control; virtual instrumentation; voltage control; delays; pulse delay control; capacitor voltage balancing; three level boost neutral point clamped inverter; multioutput DC-DC converters; cross regulation effect; grid integration; single input dual output boost converter; three-level switching scheme; inductor ripple current; proportional-integral controller; DC link voltage regulation; state-space averaging technique; inductor current ripple averaging technique; controller design; Matlab; Simulink; digital controller; Vertex; 5-FPGA; Labview-Compact-Rio module; PWM STRATEGY; MODULATION; CONVERTER; SYSTEM; SCHEME;
D O I
10.1049/iet-pel.2014.0103
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The cross regulation effect in multi-output DC/DC converters offers a reliable support for the grid integration of multilevel inverters by balancing the capacitor voltages. The capacitor voltage balancing by single input dual output boost converter is often realised by conventional three-level switching scheme. The three-level operation benefits lower inductor ripple current, but it limits the maximum possible compensation voltages. In this study, the entire operating modes of the boost converter is presented and all the possible cases which contribute to the voltage balancing are employed for balancing the capacitor voltages in a three-level neutral point clamped inverter. A proportional-integral controller based duty ratio control and pulse delay control are used for DC link voltage regulation and capacitor voltage balancing. Since the classical state-space averaging technique is not suitable for SIDO converters, inductor current ripple averaging technique is utilised for controller design. The circuit simulation is performed in Matlab/Simulink. The digital controller is realised using the Virtex-5FPGA in Labview/CompactRIO module. Both simulation and experimental results are presented to validate the controller performance.
引用
收藏
页码:268 / 277
页数:10
相关论文
共 50 条
  • [1] A neutral-point voltage balancing control method for three-level neutral-point-clamped inverter
    [J]. Song, W. (songwsh@swjtu.edu.cn), 1600, Automation of Electric Power Systems Press (38):
  • [2] Six-phase Three-level Neutral Point Clamped Inverter for Capacitor Voltage Balancing and Common-Mode Voltage Cancellation
    Wang, Shukai
    Fereydoonian, Mostafa
    Lee, Woongkul
    [J]. 2021 THIRTY-SIXTH ANNUAL IEEE APPLIED POWER ELECTRONICS CONFERENCE AND EXPOSITION (APEC 2021), 2021, : 1091 - 1096
  • [3] Carrier Based Modulation with Capacitor Balancing for Three-Level Neutral-Point-Clamped qZS Inverter
    Romero-Cadaval, Enrique
    Roncero-Clemente, Carlos
    Husev, Oleksandr
    Vinnikov, Dmitri
    [J]. PROCEEDINGS 2015 9TH INTERNATIONAL CONFERENCE ON CAMPATIBILITY AND POWER ELECTRONICS (CPE), 2015, : 57 - 62
  • [4] Application of Hysteresis Voltage Control for Three-Level Neutral Point Clamped Voltage Source Inverter
    Kolmakov, Nikolay M.
    Bakhovtsev, Igor A.
    Jalakas, Tanel
    [J]. 2015 56TH INTERNATIONAL SCIENTIFIC CONFERENCE ON POWER AND ELECTRICAL ENGINEERING OF RIGA TECHNICAL UNIVERSITY (RTUCON), 2015,
  • [5] Selective finite-states model predictive control of grid interfaced three-level neutral point clamped photovoltaic inverter for inherent capacitor voltage balancing
    Bonala, Anil Kumar
    Sandepudi, Srinivasa Rao
    Muddineni, Vishnu Prasad
    [J]. IET POWER ELECTRONICS, 2018, 11 (13) : 2072 - 2080
  • [6] Neutral Voltage Balancing Of Three Level Neutral-Clamped Inverter
    Pawar, Mrugnayani Vinayak
    Mohod, Rohit Rajendra
    Pawar, S. H.
    [J]. 2019 INNOVATIONS IN POWER AND ADVANCED COMPUTING TECHNOLOGIES (I-PACT), 2019,
  • [7] Active Capacitor Voltage Balancing Control for Three-Level Flying Capacitor Boost Converter
    Chen, Hung-Chi
    Lu, Che-Yu
    Lien, Wei-Hsiang
    [J]. THIRTY-THIRD ANNUAL IEEE APPLIED POWER ELECTRONICS CONFERENCE AND EXPOSITION (APEC 2018), 2018, : 127 - 132
  • [8] A Simple Space Vector PWM Scheme with Neutral Point Balancing for Three-Level Neutral Point Clamped Inverter
    Ko, Yoon-Hyuk
    Park, Byoung-Gun
    Kim, Rae-Young
    Hyun, Dong-Seok
    Jung, Ha-Jin
    [J]. 2011 IEEE INDUSTRY APPLICATIONS SOCIETY ANNUAL MEETING (IAS), 2011,
  • [9] Neutral-point potential balancing model and algorithm in three-level neutral-point-clamped inverter
    Wang, Y.
    Wu, X.
    Dai, P.
    Zhou, J.
    [J]. Australian Journal of Electrical and Electronics Engineering, 2012, 9 (01): : 99 - 108
  • [10] The PWM strategy for three-level NPC inverter with active balancing control of neutral point voltage
    Lewicki, Arkadiusz
    [J]. PRZEGLAD ELEKTROTECHNICZNY, 2010, 86 (02): : 289 - 294