Data Symbol Phase Synchronizers of Closed Loop

被引：0
|
作者：
Reis, Antonio D. [1 ,2 ]
Rocha, Jose F. [1 ]
Gameiro, Atilio S. [1 ]
Carvalho, Jose P. [2 ]
机构：
[1] Univ Aveiro, Inst Telecomunicacoes, Dep Elect & Telecomunicacoes, P-3810 Aveiro, Portugal
[2] Univ Beira Interior Covilha, Dept Fis, UD Remota, P-6200 Covilha, Portugal
来源：
2009 4TH INTERNATIONAL CONFERENCE ON SYSTEMS AND NETWORKS COMMUNICATIONS (ICSNC 2009) | 2009年
关键词：
Synchronism in Digital Communications; SIGNAL; NOISE;
D O I：
10.1109/ICSNC.2009.106
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
This work study the symbol phase synchronizer of closed loop. This synchronizer have all its components inside of the loop, for this reason is called closed loop. We will study this synchronizer considering four topologies namely the analog, the hybrid, the combinational and the sequential. The objective is to study the four synchronizers and to evaluate their output jitter UIRMS (Unit Interval Root Mean Square) versus input SNR (Signal to Noise Ratio).
引用
收藏
页码：270 / +
页数：2
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