A Novel Test Vector Generation Method for Hardware Trojan Detection

Hardware Trojans arc intentional addition of malicious logic into a normal circuit which is widely regarded as one of the biggest concerns for IC industry due to the presence of a global supply chain. Being very small in size, Trojans remain dormant during manufacturing tests and only gets activated during operational mode for a rare input signal combination. Existing stuck-at-fault testing methods are insufficient for Trojan detection. In this context, a methodology to produce test vector is proposed in this work which generates rare signals inside a circuit. The proposed work uses transition probability to find rare activity nets. A set of test vectors are generated based on the impact of primary inputs on rare nets to stimulate rare signals across the 'waist. The effects of final test vectors are verified with ISCAS-85 benchmark circuits and also compared with the performance of random vectors. Simulation result advocates the significance of the proposed test vectors in terms of rare net excitation.