共 11 条
- [1] On-chip estimation of hematocrit level for diagnosing anemic conditions by Impedimetric techniques Biomedical Microdevices, 2020, 22
- [2] Chip Level Thermal Profile Estimation Using On-chip Temperature Sensors 2008 IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN, 2008, : 432 - 437
- [3] High level estimation of the area and power consumption of on-chip interconnects 13TH ANNUAL IEEE INTERNATIONAL ASIC/SOC CONFERENCE, PROCEEDINGS, 2000, : 297 - 301
- [4] A linear model for high-level delay estimation in VDSM on-chip interconnects 2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS, 2005, : 1078 - 1081
- [5] Analysis of high-Q on-chip inductors realized by wafer-level packaging techniques 53RD ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE, 2003 PROCEEDINGS, 2003, : 1510 - 1515
- [7] Area and Test Cost Reduction for On-Chip Wireless Test Channels with System-Level Design Techniques PROCEEDINGS OF THE 17TH ASIAN TEST SYMPOSIUM, 2008, : 245 - +