A 10 MHz elliptic log-domain filter in a standard CMOS process

A third order elliptic log-domain filter, fabricated in 0.35mu CMOS technology, is presented. Lateral bipolar transistors inherent to standard CMOS processes and strongly-inverted MOSFET transistors have been used in this work to map traditional bipolar circuitry into CMOS technology. Experimental measurements demonstrate that bandwidths of up to 10 MHz and dynamic ranges-on the order of 40 dB can be achieved using these devices, and that both poles and zeros can be accurately placed using the described design techniques. Log-domain filters based on lateral PNP devices hold the potential of operating at higher frequencies than log-domain filters designed using subthreshold-MOS devices.