The effect of N/Si ratio on the a-Si:H/SiNx interface of a-Si:H/SiNx TFT

The threshold voltage of a-Si:H/SiNx TFT will shift under long time gate bias stress, it is mostly leaded by charge trapping in gate insulator and defect creation in semiconductor. And it is hard to be applied in AMOLED for TFF because of its threshold voltage shift. In allusion to the phenomenon of charge trapping, a series of SiN., insulating films in different N/Si (0.87-1.68) ratio were deposited by PECVD in this paper, controlling different flow ratio of source gas SiH4 and NH3, and a great deal of tests (ellipsometer, infrared absorption (FTIR) and Electron Dispersion Spectrum(EDS) test) were done on these samples. Based on these SiN, insulators, three different capacitance samples in MIS structure were done, degraded experiments and C-V tests on these samples were done. The C-V curve shift of capacitance which contained SiN., with slightly N-rich (N/Si is bigger slightly than 1.33) was not evident before and after degradation, this result indicated that the defect density of this type SiN, was smaller, and could restrain charge chapping in the interface of aSi:H/SiNx effectively. So that as gate insulator of TFT, SiNx with slightly N-rich could decrease the threshold voltage shift of TFT and enhance its stability effectively.