共 3 条
- [1] Implementation of high-side, high-voltage RESURF LDMOS in a sub-half micron smart power technology ISPSD'01: PROCEEDINGS OF THE 13TH INTERNATIONAL SYMPOSIUM ON POWER SEMICONDUCTOR DEVICES & ICS, 2001, : 403 - 406
- [2] Trade-off between hot carrier effect and current driving capability due to drain contact structures in deep submicron MOSFETs JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS, 1998, 37 (3B): : 1041 - 1046
- [3] A multi trench analog plus logic protection (M-TRAP) for substrate crosstalk prevention in a 0.25 μm smart power platform with 100V high-side capability ISPSD '04: PROCEEDINGS OF THE 16TH INTERNATIONAL SYMPOSIUM ON POWER SEMICONDUCTOR DEVICES & ICS, 2004, : 427 - 430