Implementations of continuous-time current-mode ladder filters using multiple output current integrators

被引：12

作者：

Shousha, AHM ^{[1
]}

机构：

[1] Cairo Univ, Elect & Commun Engn Dept, Giza, Egypt

来源：

INTERNATIONAL JOURNAL OF ELECTRONICS | 1998年 / 85卷 / 04期

关键词：

D O I：

10.1080/002072198134058

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Three different approaches to designing continuous-time current-mode ladder filters using multiple output current integrators are presented. These approaches are based on simulating node voltages, state variables, or loop currents of passive RLC ladder filter prototypes. Node voltage and state variable simulations yield mon compact structures than that obtained using loop current simulation. Possible CMOS implementations are presented and their performance characteristics are investigated using SPICE simulations. Scaled filters, using the constant field scaling law, are found to operate properly at low supply voltages, down to 1.0 V.

引用

页码：497 / 509

页数：13

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